Exploring VDMA and Implementing Loop Testing on the PYNQ Z2 FPGA Platform
In our previous blog post, we explored the development and implementation of a Sobel filter IP core on the PYNQ Z2 FPGA. There we explained how to design the filter in Vitis HLS, export and integrate the IP (Intellectual Property) core into Vivado, and finally control the Sobel Filter using Direct Access Memory (DMA) in the PYNQ environment. In this post, we will be using a different approach called Video Direct Memory Access (VDMA). It is similar to the DMA, but designed for video applications.